{"id":5320,"date":"2018-01-21T09:33:52","date_gmt":"2018-01-21T09:33:52","guid":{"rendered":"http:\/\/www.inspirenignite.com\/jntuh\/?p=5320"},"modified":"2020-06-19T15:28:39","modified_gmt":"2020-06-19T15:28:39","slug":"digital-system-design-syllabus-jntuh-b-tech-2016-17-r16","status":"publish","type":"post","link":"https:\/\/www.inspirenignite.com\/jntuh\/digital-system-design-syllabus-jntuh-b-tech-2016-17-r16\/","title":{"rendered":"Digital system Design Syllabus JNTUH B.Tech 2016-17 (R16)"},"content":{"rendered":"<p>Digital system Design syllabus for JNTUH B.Tech III year II sem is covered here. This gives the details about credits, number of hours and other details along with reference books for the course.<\/p>\n<h3>Digital system Design Syllabus JNTUH R16<\/h3>\n<p>B.Tech. III Year II Sem. \u00a0 \u00a0 \u00a0 L\/T\/P\/C<br \/>\nCourse Code:EC614PE \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 3\/0\/0\/3<\/p>\n<p><strong>Course Objectives:<\/strong><\/p>\n<ul>\n<li>To provide extended knowledge of digital logic circuits in the form of state model\u00a0approach.<\/li>\n<li>To provide an overview of system design approach using programmable logic\u00a0devices.<\/li>\n<li>To provide and understand of fault models and test methods.<\/li>\n<\/ul>\n<p><strong>Course Outcomes:<\/strong><\/p>\n<ul>\n<li>To understands the minimization of Finite state machine.<\/li>\n<li>To exposes the design approaches using ROM\u2019s, PAL\u2019s and PLA\u2019s.<\/li>\n<li>To provide in depth understanding of Fault models.<\/li>\n<li>To understands test pattern generation techniques for fault detection.<\/li>\n<li>To design fault diagnosis in sequential circuits.<\/li>\n<\/ul>\n<p><strong>UNIT &#8211; I:\u00a0Minimization and Transformation of Sequential Machines:<\/strong> The Finite State Model \u2013\u00a0Capabilities and limitations of FSM \u2013 State equivalence and machine minimization \u2013\u00a0Simplification of incompletely specified machines.\u00a0Fundamental mode model \u2013 Flow table \u2013 State reduction \u2013 Minimal closed covers \u2013 Races,\u00a0Cycles and Hazards.<\/p>\n<p><strong>UNIT &#8211; II:\u00a0Digital Design:<\/strong> Digital Design Using ROMs, PALs and PLAs , BCD Adder, 32 \u2013 bit adder,\u00a0State graphs for control circuits, Scoreboard and Controller, A shift and add multiplier, Array\u00a0multiplier, Keypad Scanner, Binary divider.<\/p>\n<p><strong>UNIT &#8211; III:\u00a0SM Charts:<\/strong> State machine charts, Derivation of SM Charts, Realization of SM Chart,\u00a0Implementation of Binary Multiplier, dice game controller.<\/p>\n<p style=\"text-align: center\"><a href=\"https:\/\/play.google.com\/store\/apps\/details?id=ini.istudy\" target=\"_blank\" rel=\"noopener\"><strong><span style=\"color: #ff0000\">Download iStudy Android App for complete JNTUH syllabus, results, timetables and all other updates. There are no ads and no pdfs and will make your life way easier<\/span>.<\/strong><\/a><\/p>\n<p><strong>TEXT BOOKS:<\/strong><\/p>\n<ul>\n<li>Fundamentals of Logic Design \u2013 Charles H. Roth, 5th ed., Cengage Learning.<\/li>\n<li>Digital Systems Testing and Testable Design \u2013 Miron Abramovici, Melvin A. Breuer\u00a0and Arthur D. Friedman- John Wiley &amp; Sons Inc.<\/li>\n<\/ul>\n<p><strong>REFERENCE BOOKS:<\/strong><\/p>\n<ul>\n<li>Switching and Finite Automata Theory \u2013 Z. Kohavi , 2nd ed., 2001, McGraw Hill<\/li>\n<li>Digital Design \u2013 Morris Mano, M.D.Ciletti, 4th Edition, Pearson<\/li>\n<\/ul>\n<p>For all other B.Tech 3rd Year 2nd Sem syllabus go to <a href=\"https:\/\/www.inspirenignite.com\/jntuh\/jntuh-third-year-second-sem-electronics-telematics-engineering-course-structure-2016-2017-r16-batch\/\">JNTUH B.Tech Electronics and Telematics Engineering\u00a03rd\u00a0Year 2nd Sem Course Structure for (R16) Batch.<\/a><\/p>\n<p>All details and yearly new syllabus will be updated here time to time. Subscribe, like us on facebook and follow us on google plus for all updates.<\/p>\n<p>Do share with friends and in case of questions please feel free drop a comment.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Digital system Design syllabus for JNTUH B.Tech III year II sem is covered here. This gives the details about credits, number of hours and other details along with reference books [&hellip;]<\/p>\n","protected":false},"author":2259,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_bbp_topic_count":0,"_bbp_reply_count":0,"_bbp_total_topic_count":0,"_bbp_total_reply_count":0,"_bbp_voice_count":0,"_bbp_anonymous_reply_count":0,"_bbp_topic_count_hidden":0,"_bbp_reply_count_hidden":0,"_bbp_forum_subforum_count":0,"footnotes":""},"categories":[62],"tags":[],"class_list":["post-5320","post","type-post","status-publish","format-standard","hentry","category-syllabus"],"_links":{"self":[{"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/posts\/5320","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/users\/2259"}],"replies":[{"embeddable":true,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/comments?post=5320"}],"version-history":[{"count":4,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/posts\/5320\/revisions"}],"predecessor-version":[{"id":22265,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/posts\/5320\/revisions\/22265"}],"wp:attachment":[{"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/media?parent=5320"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/categories?post=5320"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.inspirenignite.com\/jntuh\/wp-json\/wp\/v2\/tags?post=5320"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}