Full custom IC Design Detailed Syllabus for VLSI\/ VLSI Design\/VLSI System Design M.Tech first year second sem is covered here. This gives the details about credits, number of hours and other details along with reference books for the course.<\/p>\n
The detailed syllabus for Full custom IC Design M.Tech 2017-2018 (R17) first year second sem is as follows.<\/p>\n
M.Tech. I Year II Sem.<\/p>\n
UNIT – I : Introduction:<\/strong> Schematic fundamentals, Layout design, Introduction to CMOS VLSI manufacturing processes, Layers and connectivity, Process design rules Significance of full custom IC design, layout design flows.<\/p>\n UNIT – II : Advanced techniques<\/strong> for specialized building blocks Standard cell libraries, Pad cells and Laser fuse cells, Advanced techniques for building blocks, Power grid Clock signals<\/p>\n UNIT – III : Interconnect routing.<\/strong> Interconnect layout design, Special electrical requirements, Layout design techniques to address electrical characteristics.<\/p>\n UNIT – IV : Layout considerations<\/strong> due to process constraints Large metal via implementations, Step coverage rules, Special design rules, Latch-up and Guard rings, Constructing the pad ring, Minimizing Stress effects.<\/p>\n UNIT – V : Proper layout<\/strong> CAD tools for layout, Planning tools, Layout generation tools, Support tools.<\/p>\n TEXT BOOKS:<\/strong><\/p>\n