CPLD and FPGA Architectures and Applications Detailed Syllabus for VLSI/ VLSI Design/VLSI System Design M.Tech first year first sem is covered here. This gives the details about credits, number of hours and other details along with reference books for the course.
The detailed syllabus for CPLD and FPGA Architectures and Applications M.Tech 2017-2018 (R17) first year first sem is as follows.
M.Tech. I Year I Sem.
UNIT-I : Introduction to Programmable Logic Devices: Introduction, Simple Programmable Logic Devices – Read Only Memories, Programmable Logic Arrays, Programmable Array Logic, Programmable Logic Devices/Generic Array Logic; Complex Programmable Logic Devices – Architecture of Xilinx Cool Runner XCR3064XL CPLD, CPLD Implementation of a Parallel Adder with Accumulation.
UNIT-II : Field Programmable Gate Arrays: Organization of FPGAs, FPGA Programming Technologies, Programmable Logic Block Architectures, Programmable Interconnects, Programmable I/O blocks in FPGAs, Dedicated Specialized Components of FPGAs, Applications of FPGAs.
UNIT -III : SRAM Programmable FPGAs: Introduction, Programming Technology, Device Architecture, The Xilinx XC2000, XC3000 and XC4000 Architectures.
UNIT -IV : Anti-Fuse Programmed FPGAs: Introduction, Programming Technology, Device Architecture, The Actel ACT1, ACT2 and ACT3 Architectures.
UNIT -V : Design Applications: General Design Issues, Counter Examples, A Fast Video Controller, A Position Tracker for a Robot Manipulator, A Fast DMA Controller, Designing Counters with ACT devices, Designing Adders and Accumulators with the ACT Architecture.
TEXT BOOKS:
- Stephen M. Trimberger, “Field Programmable Gate Array Technology”, Springer International Edition.
- Charles H. Roth Jr, Lizy Kurian John, “Digital Systems Design”, Cengage Learning.
REFERENCE BOOKS:
- John V. Oldfield, Richard C. Dorf, “Field Programmable Gate Arrays”, Wiley India.
- Pak K. Chan/Samiha Mourad, “Digital Design Using Field Programmable Gate Arrays” Pearson Low Price Edition.
- Ian Grout, “Digital Systems Design with FPGAs and CPLDs”, Elsevier, Newnes.
- Wayne Wolf, “Modern Semiconductor Design Series”, Prentice Hall.
For all other M.Tech 1st Year 1st Sem syllabus go to JNTUH M.Tech VLSI/ VLSI Design/VLSI System Design 1st Year 1st Sem Course Structure for (R17) Batch.
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