EI403PC: Digital System Design EIE Syllabus for B.Tech 2nd Year 2nd Sem R18 Regulation JNTUH

Digital System Design detailed syllabus for Electronics & Instrumentation Engineering (EIE), 2nd Year 2nd Sem R18 regulation has been taken from the JNTUH official website and presented for the B.Tech students affiliated to JNTUH course structure. For Course Code, Subject Names, Theory Lectures, Tutorial, Practical/Drawing, Credits, and other information do visit full semester subjects post given below. We make sure the result links and syllabus uploaded here is latest and up to date, also the syllabus PDF files can also be downloaded from the universities official website.

For Electronics & Instrumentation Engineering (EIE) 2nd Year 2nd Sem R18 Regulation Scheme, do visit EIE 2nd Year 2nd Sem R18 Scheme. The detailed syllabus for digital system design is as follows.

Digital System Design Subject Syllabus for EIE 2nd Year 2nd Sem R18 Regulation

Pre-Requisites:

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Course Objectives:

To understand common forms of number representation in logic circuits
To learn basic techniques for the design of digital circuits and fundamental concepts used in the design of digital systems.
To understand the concepts of combinational logic circuits and sequential circuits.
To understand the Realization of Logic Gates Using Diodes & Transistors.

Course Outcomes:

Upon completing this course, the student will be able to

Understand the numerical information in different forms and Boolean Algebra theorems
Postulates of Boolean algebra and to minimize combinational functions
Design and analyze combinational and sequential circuits
Known about the logic families and realization of logic gates.

UNIT – I

UNIT – II:

Minimization of Boolean functions: Karnaaugh Map Method – Up to five Variables, Don’t Care Map Entries, Tabular Method,
Combinational Logic Circuits: Adders, Subtractors, Comparators, Multiplexers, Demultiplexers, Encoders, Decoders and Code converters, Hazards and Hazard Free Relations.

UNIT – III

Sequential Circuits Fundamentals: Basic Architectural Distinctions between Combinational and Sequential circuits, SR Latch, Flip Flops: SR, JK, JK Master Slave, D and T Type Flip Flops, Excitation Table of all Flip Flops, Timing and Triggering Consideration, Conversion from one type of Flip-Flop to another.
Registers and Counters: Shift Registers – Left, Right and Bidirectional Shift Registers, Applications of Shift Registers – Design and Operation of Ring and Twisted Ring Counter, Operation of Asynchronous and Synchronous Counters.

UNIT – IV

UNIT – V

Realization of Logic Gates Using Diodes & Transistors: AND, OR and NOT Gates using Diodes and Transistors, DCTL, RTL, DTL, TTL, CML and CMOS Logic Families and its Comparison, Classification of Integrated circuits, comparison of various logic families, standard TTL NAND GateAnalysis & characteristics, TTL open collector O/Ps, Tristate TTL, MOS & CMOS open drain and tristate outputs, CMOS transmission gate, IC interfacing- TTL driving CMOS & CMOS driving TTL.

TEXT BOOKS:

Switching and Finite Automata Theory – Zvi Kohavi & Niraj K. Jha, 3rd Edition, Cambridge, 2010.
Modern Digital Electronics – R. P. Jain, 3rd Edition, 2007- Tata McGraw-Hill

REFERENCE BOOKS:

For detailed syllabus of all the other subjects of B.Tech 2nd Year Electronics & Instrumentation Engineering (EIE), visit Electronics & Instrumentation Engineering (EIE) 2nd Year Syllabus Subjects.

For results of Electronics & Instrumentation Engineering (EIE) 2nd Year 2nd Sem R18 Regulation, visit EIE 2nd Year 2nd Sem R18 Regulation results direct link.

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