E – Cad Lab detailed Syllabus for Electronics & Communication Engineering (ECE), R18 regulation has been taken from the JNTUH official website and presented for the students affiliated to JNTUH course structure. For Course Code, Subject Names, Theory Lectures, Tutorial, Practical/Drawing, Credits, and other information do visit full semester subjects post given below. The Syllabus PDF files can also be downloaded from the universities official website.
For all other ECE 3rd Year 2nd Sem Syllabus for B.Tech R18 Regulation JNTUH, do visit ECE 3rd Year 2nd Sem Syllabus for B.Tech R18 Regulation JNTUH Subjects. The detailed Syllabus for e – cad lab is as follows.
Pre-requisite:
For the complete Syllabus, results, class timetable, and many other features kindly download the iStudy App
It is a lightweight, easy to use, no images, and no pdfs platform to make students’s lives easier.
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Note:
Any SIX of the following experiments from each part are to be conducted (Total 12)
Part – I
All the following experiments have to be implemented using HDL
- Realize all the logic gates
- Design of 8-to-3 encoder (without and with priority) and 2-to-4 decoder
- Design of 8-to-1 multiplexer and 1-to-8 demultiplexer
- Design of 4 bit binary to gray code converter
- Design of 4 bit comparator
- Design of Full adder using 3 modeling styles
- Design of flip flops: SR, D, JK, T
- Design of 4-bit binary, BCD coUniters (synchronous/ asynchronous reset) or any sequence coUniter
- Finite State Machine Design
Part-II
For the complete Syllabus, results, class timetable, and many other features kindly download the iStudy App
It is a lightweight, easy to use, no images, and no pdfs platform to make students’s lives easier..
For detail Syllabus of all other subjects of B.Tech 3rd Year Electronics & Communication Engineering, visit ECE 3rd Year Syllabus Subjects.
For all B.Tech results, visit JNTUH B.Tech all years, and semester results from direct links.