EC603PC: Vlsi Design ECE Syllabus for B.Tech 3rd Year 2nd Sem R18 Regulation JNTUH

Vlsi Design detailed Syllabus for Electronics & Communication Engineering (ECE), R18 regulation has been taken from the JNTUH official website and presented for the students affiliated to JNTUH course structure. For Course Code, Subject Names, Theory Lectures, Tutorial, Practical/Drawing, Credits, and other information do visit full semester subjects post given below. The Syllabus PDF files can also be downloaded from the universities official website.

For all other ECE 3rd Year 2nd Sem Syllabus for B.Tech R18 Regulation JNTUH, do visit ECE 3rd Year 2nd Sem Syllabus for B.Tech R18 Regulation JNTUH Subjects. The detailed Syllabus for vlsi design is as follows.

Pre-requisite:

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Course Objectives:

The objectives of the course are to:

1. Give exposure to different steps involved in the fabrication of ICs.
2. Explain electrical properties of MOS and BiCMOS devices to analyze the behavior of inverters designed with various loads.
3. Give exposure to the design rules to be followed to draw the layout of any logic circuit.
4. Provide design concepts to design building blocks of data path of any system using gates.
5. Understand basic programmable logic devices and testing of CMOS circuits.

Course Outcomes:

Upon completing this course, the student will be able to

1. Acquire qualitative knowledge about the fabrication process of integrated circuits using MOS transistors.
2. Draw the layout of any logic circuit which helps to understand and estimate parasitic effect of any logic circuit
3. Design building blocks of data path systems, memories and simple logic circuits using PLA, PAL, FPGA and CPLD.
4. Understand different types of faults that can occur in a system and learn the concept of testing and adding extra hardware to improve testability of system.

Unit I

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Unit II

VLSI Circuit Design Processes: VLSI Design Flow, MOS Layers, Stick Diagrams, Design Rules and Layout, Transistors Layout Diagrams for NMOS and CMOS Inverters and Gates, Scaling of MOS circuits.

Unit III

Gate Level Design: Logic Gates and Other complex gates, Switch logic, Alternate gate circuits, Time delays, Driving large capacitive loads, Wiring capacitance, Fan – in, Fan – out.

Unit IV

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Unit V

Programmable Logic Devices: Design Approach – PLA, PAL, Standard Cells FPGAs, CPLDs.

CMOS Testing: CMOS Testing, Test Principles, Design Strategies for test, Chip level Test Techniques.

Text Books:

1. Essentials of VLSI circuits and systems – Kamran Eshraghian, Eshraghian Dougles and A.Pucknell, PHI, 2005 Edition
2. CMOS VLSI Design – A Circuits and Systems Perspective, Neil H. E Weste, David Harris, Ayan Banerjee, 3rd Ed, Pearson, 2009.

Reference Book:

For the complete Syllabus, results, class timetable, and many other features kindly download the iStudy App
It is a lightweight, easy to use, no images, and no pdfs platform to make students’s lives easier.
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For detail Syllabus of all other subjects of B.Tech 3rd Year Electronics & Communication Engineering, visit ECE 3rd Year Syllabus Subjects.

For all B.Tech results, visit JNTUH B.Tech all years, and semester results from direct links.