2nd Year, CSE

CS306ES: Analog and Digital Electronics Lab CS Syllabus for B.Tech 2nd Year 1st Sem R18 Regulation JNTUH

Analog and Digital Electronics Lab detailed syllabus for Computer Science Engineering (CS), 2nd Year 1st Sem R18 regulation has been taken from the JNTUH official website and presented for the B.Tech students affiliated to JNTUH course structure. For Course Code, Subject Names, Theory Lectures, Tutorial, Practical/Drawing, Credits, and other information do visit full semester subjects post given below. We make sure the result links and syllabus uploaded here is latest and up to date, also the syllabus PDF files can also be downloaded from the universities official website.

For Computer Science Engineering (CS) 2nd Year 1st Sem R18 Regulation Scheme, do visit CS 2nd Year 1st Sem R18 Scheme. The detailed syllabus for analog and digital electronics lab is as follows.

Analog and Digital Electronics Lab Subject Syllabus for CS 2nd Year 1st Sem R18 Regulation

Course Objectives:

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Course Outcomes:

Upon completion of the Course, the students will be able to

  • Know the characteristics of various components.
  • Understand the utilization of components.
  • Design and analyze small signal amplifier circuits.
  • Postulates of Boolean algebra and to minimize combinational functions
  • Design and analyze combinational and sequential circuits
  • Known about the logic families and realization of logic gates.

LIST OF EXPERIMENTS

  1. Full Wave Rectifier with and without filters
  2. Common Emitter Amplifier Characteristics
  3. Common Base Amplifier Characteristics
  4. Common Source amplifier Characteristics
  5. Measurement of h-parameters of transistor in CB, CE, CC configurations
  6. Input and Output characteristics of FET in CS configuration
  7. Realization of Boolean Expressions using Gates
  8. Design and realization logic gates using universal gates
  9. generation of clock using NAND / NOR gates
  10. Design a 4 – bit Adder / Subtractor
  11. Design and realization a Synchronous and Asynchronous counter using flip-flops
  12. Realization of logic gates using DTL, TTL, ECL, etc.

For detailed syllabus of all the other subjects of B.Tech 2nd Year Computer Science Engineering (CS), visit Computer Science Engineering (CS) 2nd Year Syllabus Subjects.

For results of Computer Science Engineering (CS) 2nd Year 1st Sem R18 Regulation, visit CS 2nd Year 1st Sem R18 Regulation results direct link.

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