Digital Logic Circuits Syllabus for B.Tech 3rd sem is covered here. This gives the details about credits, number of hours and other details along with reference books for the course.<\/p>\n
The detailed syllabus for Digital Logic Circuits B.Tech (R13) thirdsem is as follows<\/p>\n
OBJECTIVES:<\/strong><\/p>\n UNIT I : NUMBER SYSTEMS AND DIGITAL LOGIC FAMILIES<\/strong> \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0[9 hours] UNIT II : COMBINATIONAL CIRCUITS<\/strong> \u00a0 \u00a0\u00a0[9 hours] UNIT III : SYNCHRONOUS SEQUENTIAL CIRCUITS<\/strong> \u00a0 \u00a0\u00a0[9 hours]\n
\nReview of number systems, binary codes, error detection and correction codes (Parity and Hamming\u00a0code0- Digital Logic Families ,comparison of RTL, DTL, TTL, ECL and MOS families -operation,\u00a0characteristics of digital logic family.<\/p>\n
\nCombinational logic – representation of logic functions-SOP and POS forms, K-map representationsminimization\u00a0using K maps – simplification and implementation of combinational logic – multiplexers\u00a0and demultiplexers – code converters, adders, subtractors.<\/p>\n
\nSequential logic- SR, JK, D and T flip flops – level triggering and edge triggering – counters –\u00a0asynchronous and synchronous type – Modulo counters – Shift registers – design of synchronous\u00a0sequential circuits \u2013 Moore and Melay models- Counters, state diagram; state reduction; state\u00a0assignment.<\/p>\n